Lattice Mapping Report File for Design Module 'mcpu' Design Information Command line: map -a MachXO2 -p LCMXO2-256HC -t QFN32 -s 4 -oc Commercial qfn32samples_mcpu2.ngd -o qfn32samples_mcpu2_map.ncd -pr qfn32samples_mcpu2.prf -mp qfn32samples_mcpu2.mrp Z:/XC2C/xo2qfn-w07/src/mcpu2_g.lpf -c 0 Target Vendor: LATTICE Target Device: LCMXO2-256HCQFN32 Target Performance: 4 Mapper: xo2c00, version: Diamond_1.4_Production (87) Mapped on: 06/25/12 10:55:58 Design Summary Number of registers: 33 PFU registers: 25 PIO registers: 8 Number of SLICEs: 56 out of 128 (44%) SLICEs(logic/ROM): 32 out of 32 (100%) SLICEs(logic/ROM/RAM): 24 out of 96 (25%) As RAM: 6 out of 96 (6%) As Logic/ROM: 18 out of 96 (19%) Number of logic LUT4s: 81 Number of distributed RAM: 6 (12 LUT4s) Number of ripple logic: 9 (18 LUT4s) Number of shift registers: 0 Total number of LUT4s: 111 Number of PIO sites used: 11 out of 22 (50%) Number of block RAMs: 0 out of 0 Number of GSRs: 0 out of 1 (0%) EFB used : No JTAG used : No Readback used : No Oscillator used : No Startup used : No POR : On Bandgap : On Number of Power Controller: 0 out of 1 (0%) Number of Dynamic Bank Controller (BCINRD): 0 out of 4 (0%) Number of DCCA: 0 out of 8 (0%) Number of DCMA: 0 out of 2 (0%) Notes:- 1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of distributed RAMs) + 2*(Number of ripple logic) 2. Number of logic LUT4s does not include count of distributed RAM and ripple logic. Number of clocks: 2 Net CLK_c: 15 loads, 12 rising, 3 falling (Driver: PIO CLK ) Net O_STB_c: 8 loads, 8 rising, 0 falling (Driver: i3_4_lut_adj_2 ) Number of Clock Enables: 3 Net n859: 4 loads, 4 LSLICEs Net n845: 1 loads, 1 LSLICEs Net rom_rd: 3 loads, 3 LSLICEs Number of LSRs: 3 Net RST_c: 8 loads, 8 LSLICEs Net n1008: 2 loads, 2 LSLICEs Net n1387: 1 loads, 1 LSLICEs Number of nets driven by tri-state buffers: 0 Top 10 highest fanout non-clock nets: Net r_addr_3: 45 loads Net r_addr_1: 44 loads Net r_addr_2: 44 loads Net r_addr_4: 37 loads Net r_addr_0: 26 loads Net r_addr_5: 18 loads Net RST_c: 13 loads Net code_data_3: 12 loads Net code_data_0: 11 loads Net code_data_2: 11 loads Number of warnings: 6 Number of errors: 0 Design Errors/Warnings WARNING: input pad net 'SCL' has no legal load WARNING: input pad net 'SDA' has no legal load WARNING: logical net 'add_26_1/CI' has no driver WARNING: logical net 'add_152_2/CI' has no driver WARNING: IO buffer missing for top level port SCL...logic will be discarded. WARNING: IO buffer missing for top level port SDA...logic will be discarded. IO (PIO) Attributes +---------------------+-----------+-----------+------------+ | IO Name | Direction | Levelmode | IO | | | | IO_TYPE | Register | +---------------------+-----------+-----------+------------+ | O_PORT_7 | OUTPUT | LVCMOS25 | OUT | +---------------------+-----------+-----------+------------+ | RST | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | CLK | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | O_STB | OUTPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | O_PORT_0 | OUTPUT | LVCMOS25 | OUT | +---------------------+-----------+-----------+------------+ | O_PORT_1 | OUTPUT | LVCMOS25 | OUT | +---------------------+-----------+-----------+------------+ | O_PORT_2 | OUTPUT | LVCMOS25 | OUT | +---------------------+-----------+-----------+------------+ | O_PORT_3 | OUTPUT | LVCMOS25 | OUT | +---------------------+-----------+-----------+------------+ | O_PORT_4 | OUTPUT | LVCMOS25 | OUT | +---------------------+-----------+-----------+------------+ | O_PORT_5 | OUTPUT | LVCMOS25 | OUT | +---------------------+-----------+-----------+------------+ | O_PORT_6 | OUTPUT | LVCMOS25 | OUT | +---------------------+-----------+-----------+------------+ Removed logic Block m0_lut undriven or does not drive anything - clipped. Block GSR_INST undriven or does not drive anything - clipped. Signal rom_impl/n4 was merged into signal CLK_c Signal n1524 undriven or does not drive anything - clipped. Signal GND_net undriven or does not drive anything - clipped. Signal VCC_net undriven or does not drive anything - clipped. Signal add_152_2/S0 undriven or does not drive anything - clipped. Signal add_152_2/CI undriven or does not drive anything - clipped. Signal add_152_cout/S1 undriven or does not drive anything - clipped. Signal add_152_cout/CO undriven or does not drive anything - clipped. Signal add_26_1/S0 undriven or does not drive anything - clipped. Signal add_26_1/CI undriven or does not drive anything - clipped. Signal add_26_7/CO undriven or does not drive anything - clipped. Block rom_impl/i4 was optimized away. Block i1 was optimized away. Block i2 was optimized away. Memory Usage /: EBRs: 0 RAM SLICEs: 2 Logic SLICEs: 33 PFU Registers: 25 /sram_impl/mem0: EBRs: 0 RAM SLICEs: 1 Logic SLICEs: 0 PFU Registers: 0 /sram_impl/mem1: EBRs: 0 RAM SLICEs: 3 Logic SLICEs: 0 PFU Registers: 0 Run Time and Memory Usage ------------------------- Total CPU Time: 1 secs Total REAL Time: 12 secs Peak Memory Usage: 25 MB Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2011 Lattice Semiconductor Corporation, All rights reserved.