Lattice Mapping Report File for Design Module 'dac3'


Design Information

Command line:   map -a MachXO2 -p LCMXO2-256HC -t TQFP100 -s 4 -oc Commercial
     qfn32samples_dac.ngd -o qfn32samples_dac_map.ncd -pr qfn32samples_dac.prf
     -mp qfn32samples_dac.mrp Z:/XC2C/qfn32samples-06/qfn32samples.lpf -c 0
Target Vendor:  LATTICE
Target Device:  LCMXO2-256HCTQFP100
Target Performance:   4
Mapper:  xo2c00,  version:  Diamond_1.4_Production (87)
Mapped on:  06/22/12  16:24:30


Design Summary
   Number of registers:    37
      PFU registers:    34
      PIO registers:    3
   Number of SLICEs:            25 out of   128 (20%)
      SLICEs(logic/ROM):        25 out of    32 (78%)
      SLICEs(logic/ROM/RAM):     0 out of    96 (0%)
          As RAM:            0 out of    96 (0%)
          As Logic/ROM:      0 out of    96 (0%)
   Number of logic LUT4s:      30
   Number of distributed RAM:   0 (0 LUT4s)
   Number of ripple logic:      8 (16 LUT4s)
   Number of shift registers:   0
   Total number of LUT4s:      46
   Number of PIO sites used: 22 out of 56 (39%)
   Number of block RAMs:  0 out of 0
   Number of GSRs:  0 out of 1 (0%)
   EFB used :       No
   JTAG used :      No
   Readback used :  No
   Oscillator used :  No
   Startup used :   No
   POR :            On
   Bandgap :        On
   Number of Power Controller:  0 out of 1 (0%)
   Number of Dynamic Bank Controller (BCINRD):  0 out of 4 (0%)
   Number of DCCA:  0 out of 8 (0%)
   Number of DCMA:  0 out of 2 (0%)
   Notes:-
      1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of
     distributed RAMs) + 2*(Number of ripple logic)
      2. Number of logic LUT4s does not include count of distributed RAM and
     ripple logic.
   Number of clocks:  1
     Net CLK_c: 24 loads, 24 rising, 0 falling (Driver: PIO CLK )
   Number of Clock Enables:  1
     Net n39: 11 loads, 11 LSLICEs
   Number of LSRs:  2
     Net n39: 8 loads, 8 LSLICEs
     Net n359: 8 loads, 8 LSLICEs
   Number of nets driven by tri-state buffers:  0
   Top 10 highest fanout non-clock nets:
     Net n39: 20 loads
     Net count_13: 17 loads

     Net n359: 8 loads
     Net I_DATA_c_14: 5 loads
     Net count_0: 3 loads
     Net count_12: 3 loads
     Net I_DATA_c_13: 3 loads
     Net I_DATA_c_15: 3 loads
     Net r_data_14: 3 loads
     Net r_out0: 3 loads




   Number of warnings:  1
   Number of errors:    0




Design Errors/Warnings

WARNING: logical net 'count_49_add_4_1/CI' has no driver



IO (PIO) Attributes

+---------------------+-----------+-----------+------------+
| IO Name             | Direction | Levelmode | IO         |
|                     |           |  IO_TYPE  | Register   |
+---------------------+-----------+-----------+------------+
| A_OUT_2             | OUTPUT    | LVCMOS25  | OUT        |
+---------------------+-----------+-----------+------------+
| A_OUT_1             | OUTPUT    | LVCMOS25  | OUT        |
+---------------------+-----------+-----------+------------+
| A_OUT_0             | OUTPUT    | LVCMOS25  | OUT        |
+---------------------+-----------+-----------+------------+
| O_STB               | OUTPUT    | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| CLK                 | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| STB                 | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_15           | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_14           | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_13           | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_12           | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_11           | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_10           | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_9            | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_8            | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_7            | INPUT     | LVCMOS25  |            |

+---------------------+-----------+-----------+------------+
| I_DATA_6            | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_5            | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_4            | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_3            | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_2            | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_1            | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| I_DATA_0            | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+



Removed logic

Block GSR_INST undriven or does not drive anything - clipped.
Signal VCC_net undriven or does not drive anything - clipped.
Signal count_49_add_4_15/S1 undriven or does not drive anything - clipped.
Signal count_49_add_4_15/CO undriven or does not drive anything - clipped.
Signal count_49_add_4_1/S0 undriven or does not drive anything - clipped.
Signal count_49_add_4_1/CI undriven or does not drive anything - clipped.
Block i2 was optimized away.



Memory Usage




Run Time and Memory Usage
-------------------------

   Total CPU Time: 1 secs
   Total REAL Time: 10 secs
   Peak Memory Usage: 22 MB





















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