I/O Timing Report
WARNING - Output clock frequency on pin CLKOP of pll is   12.0 MHz, which with divider 16, requires internal VCO frequency to be   192.0 MHz (  12.0 MHz x 16), outside VCO valid range [400, 800] MHz. 
WARNING - Output clock frequency on pin CLKOP of pll is   12.0 MHz, which with divider 16, requires internal VCO frequency to be   192.0 MHz (  12.0 MHz x 16), outside VCO valid range [400, 800] MHz. 
WARNING - Output clock frequency on pin CLKOP of pll is   12.0 MHz, which with divider 16, requires internal VCO frequency to be   192.0 MHz (  12.0 MHz x 16), outside VCO valid range [400, 800] MHz. 
WARNING - Output clock frequency on pin CLKOP of pll is   12.0 MHz, which with divider 16, requires internal VCO frequency to be   192.0 MHz (  12.0 MHz x 16), outside VCO valid range [400, 800] MHz. 
// Design: tool_test
// Package: TQFP144
// ncd File: machxo2_breakout_test_hdl_xo2.ncd
// Version: Diamond_1.4_Production (87)
// Written on Sat Feb 25 15:48:10 2012
// M: Minimum Performance Grade
// iotiming MachXO2_Breakout_test_hdl_xo2.ncd MachXO2_Breakout_test_hdl_xo2.prf

I/O Timing Report (All units are in ns)

Worst Case Results across Performance Grades (M, 3, 2, 1):

// Input Setup and Hold Times

Port  Clock Edge  Setup Performance_Grade  Hold Performance_Grade
----------------------------------------------------------------------
(no input setup/hold data)


// Clock to Output Delay

Port  Clock  Edge  Max_Delay Performance_Grade  Min_Delay Performance_Grade
------------------------------------------------------------------------
LED_2 EXTOSC R    21.603         1        8.877          M
LED_3 EXTOSC R    20.562         1        7.627          M
LED_4 EXTOSC R    18.169         1        6.127          M
LED_5 EXTOSC R    17.555         1        4.945          M
LED_6 EXTOSC R    17.190         1        4.799          M


// Internal_Clock to Input

Port  Internal_Clock
--------------------------------------------------------
TOP_T CLK           


// Internal_Clock to Output

Port  Internal_Clock
--------------------------------------------------------
LED_0 CLK           
LED_1 CLK           
LED_2 CLK           
LED_3 CLK           
LED_4 CLK           
LED_5 CLK           
LED_6 CLK           
LED_7 CLK