Lattice Mapping Report File for Design Module 'xo2_isp'


Design Information

Command line:   map -a MachXO2 -p LCMXO2-1200ZE -t TQFP144 -s 1 -oc Commercial
     MachXO2_Breakout_rtavr_xo2.ngd -o MachXO2_Breakout_rtavr_xo2_map.ncd -pr
     MachXO2_Breakout_rtavr_xo2.prf -mp MachXO2_Breakout_rtavr_xo2.mrp
     C:/Documents and Settings/suz/My
     Documents/rtavr_diamond/MachXO2_Breakout.lpf -c 0
Target Vendor:  LATTICE
Target Device:  LCMXO2-1200ZETQFP144
Target Performance:   1
Mapper:  xo2c00,  version:  Diamond_1.4_Production (87)
Mapped on:  02/25/12  13:39:55


Design Summary
   Number of registers:    457
      PFU registers:    457
      PIO registers:    0
   Number of SLICEs:           592 out of   640 (93%)
      SLICEs(logic/ROM):       160 out of   160 (100%)
      SLICEs(logic/ROM/RAM):   432 out of   480 (90%)
          As RAM:           30 out of   480 (6%)
          As Logic/ROM:    402 out of   480 (84%)
   Number of logic LUT4s:     945
   Number of distributed RAM:  30 (60 LUT4s)
   Number of ripple logic:     72 (144 LUT4s)
   Number of shift registers:   0
   Total number of LUT4s:     1149
   Number of PIO sites used: 16 out of 108 (15%)
   Number of block RAMs:  7 out of 7 (100%)
   Number of GSRs:  0 out of 1 (0%)
   EFB used :       No
   JTAG used :      Yes
   Readback used :  No
   Oscillator used :  Yes
   Startup used :   No
   POR :            On
   Bandgap :        On
   Number of Power Controller:  0 out of 1 (0%)
   Number of Dynamic Bank Controller (BCINRD):  0 out of 4 (0%)
   Number of Dynamic Bank Controller (BCLVDSO):  0 out of 1 (0%)
   Number of DCCA:  0 out of 8 (0%)
   Number of DCMA:  1 out of 2 (50%)
   Number of PLLs:  1 out of 1 (100%)
   Number of DQSDLLs:  0 out of 2 (0%)
   Number of CLKDIVC:  0 out of 4 (0%)
   Number of ECLKSYNCA:  0 out of 4 (0%)
   Number of ECLKBRIDGECS:  0 out of 2 (0%)
   Notes:-
      1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of
     distributed RAMs) + 2*(Number of ripple logic)
      2. Number of logic LUT4s does not include count of distributed RAM and
     ripple logic.
   Number of clocks:  7
     Net CLK180_OUT: 146 loads, 123 rising, 23 falling (Driver: pll )
     Net CLK0_OUT: 111 loads, 111 rising, 0 falling (Driver: pll )

     Net CLK90_OUT: 14 loads, 14 rising, 0 falling (Driver: pll )
     Net CLK270_OUT: 23 loads, 23 rising, 0 falling (Driver: pll )
     Net RTAVR/CLK_L: 8 loads, 8 rising, 0 falling (Driver:
     RTAVR/ROM/i10756_2_lut )
     Net RTAVR/CLK_B: 9 loads, 9 rising, 0 falling (Driver:
     RTAVR/RAM/i11_3_lut_4_lut )
     Net RTAVR/RAM/CLK_90_270: 2 loads, 2 rising, 0 falling (Driver:
     RTAVR/RAM/i6_2_lut_3_lut_4_lut )
   Number of Clock Enables:  47
     Net n12277: 1 loads, 1 LSLICEs
     Net n1_adj_86: 1 loads, 1 LSLICEs
     Net n1_adj_87: 1 loads, 1 LSLICEs
     Net ISP/n352: 5 loads, 5 LSLICEs
     Net ISP_LOAD: 8 loads, 8 LSLICEs
     Net ISP/n351: 2 loads, 2 LSLICEs
     Net ISP/n73: 1 loads, 1 LSLICEs
     Net ISP/n59: 3 loads, 3 LSLICEs
     Net ISP/n3342: 4 loads, 4 LSLICEs
     Net ISP/n3420: 4 loads, 4 LSLICEs
     Net RTAVR/INT_ACK: 1 loads, 1 LSLICEs
     Net RTAVR/n1108: 4 loads, 4 LSLICEs
     Net RTAVR/S1/n1113: 12 loads, 12 LSLICEs
     Net RTAVR/ROM/WEBL: 4 loads, 4 LSLICEs
     Net RTAVR/IOR/WE_tccr0b: 2 loads, 2 LSLICEs
     Net RTAVR/IOR/WE_port_c: 4 loads, 4 LSLICEs
     Net RTAVR/IOR/WE_ucsrb: 3 loads, 3 LSLICEs
     Net RTAVR/IOR/WE_ddr_c: 7 loads, 7 LSLICEs
     Net RTAVR/IOR/WE_spcr: 2 loads, 2 LSLICEs
     Net RTAVR/IOR/WE_mcucr: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/WE_udr: 5 loads, 5 LSLICEs
     Net RTAVR/IOR/i_usart/n366: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n3338: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n3334: 4 loads, 4 LSLICEs
     Net RTAVR/IOR/i_usart/n5907: 2 loads, 2 LSLICEs
     Net RTAVR/IOR/n957: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n2709: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n9960: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n494: 4 loads, 4 LSLICEs
     Net RTAVR/IOR/i_usart/do_rxsft: 5 loads, 5 LSLICEs
     Net RTAVR/IOR/i_usart/n2786: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/do_txsft: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/n9964: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n2287: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n3336: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_spi/cond_spif_1: 2 loads, 2 LSLICEs
     Net RTAVR/IOR/i_spi/n3353: 4 loads, 4 LSLICEs
     Net RTAVR/IOR/i_spi/n3345: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/IOR_PS0/n377: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/IOR_PS0/n384: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/IOR_PS0/n391: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/IOR_PS0/WE_gimsk: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/IOR_PS0/WE_nvmcmd: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/IOR_PS0/WE_timsk: 2 loads, 2 LSLICEs
     Net RTAVR/IOR/IOR_PS0/n3: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/IOR_PS0/i_timer0/n3385: 4 loads, 4 LSLICEs
     Net RTAVR/IOR/IOR_PS0/i_timer0/n2625: 3 loads, 3 LSLICEs

   Number of LSRs:  42
     Net ISP/n6463: 1 loads, 1 LSLICEs
     Net ISP/n36: 7 loads, 7 LSLICEs
     Net ISP/n51: 1 loads, 1 LSLICEs
     Net ISP/n5106: 1 loads, 1 LSLICEs
     Net ISP/n60: 1 loads, 1 LSLICEs
     Net ISP/n61: 1 loads, 1 LSLICEs
     Net RTAVR/BSCAN_RESET_N: 171 loads, 171 LSLICEs
     Net RTAVR/n90: 1 loads, 1 LSLICEs
     Net RTAVR/n5547: 2 loads, 2 LSLICEs
     Net RTAVR/n6377: 1 loads, 1 LSLICEs
     Net RTAVR/n2250: 1 loads, 1 LSLICEs
     Net RTAVR/rd_ior: 8 loads, 8 LSLICEs
     Net RTAVR/S1/n2833: 4 loads, 4 LSLICEs
     Net RTAVR/S1/n2418: 2 loads, 2 LSLICEs
     Net RTAVR/n427: 1 loads, 1 LSLICEs
     Net RTAVR/n9989: 1 loads, 1 LSLICEs
     Net RTAVR/n10875: 1 loads, 1 LSLICEs
     Net RTAVR/S0/n3444: 3 loads, 3 LSLICEs
     Net RTAVR/IOR/i_usart/n4: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/n2293: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n2297: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n2301: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/n10025: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n2305: 2 loads, 2 LSLICEs
     Net RTAVR/IOR/n455: 3 loads, 3 LSLICEs
     Net RTAVR/IOR/i_usart/n453: 7 loads, 7 LSLICEs
     Net RTAVR/IOR/i_usart/n2490: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/rx_ps_2: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_usart/n3120: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_spi/n2267: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_spi/n10815: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_spi/n440: 2 loads, 2 LSLICEs
     Net RTAVR/IOR/i_port_c/n2496: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_port_c/n2494: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/i_port_c/n2492: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/n2252: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/n2248: 1 loads, 1 LSLICEs
     Net RTAVR/n2244: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/n10809: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/IOR_PS0/i_timer0/n2360: 1 loads, 1 LSLICEs
     Net RTAVR/IOR/IOR_PS0/i_timer0/n184: 4 loads, 4 LSLICEs
     Net RTAVR/GPR/n2191: 1 loads, 1 LSLICEs
   Number of nets driven by tri-state buffers:  0
   Top 10 highest fanout non-clock nets:
     Net RTAVR/BSCAN_RESET_N: 256 loads
     Net RTAVR/GPR/GPR_PREDEC: 58 loads
     Net RTAVR/IOR_ADDRB_0: 49 loads
     Net RTAVR/IOR_ADDRB_1: 49 loads
     Net RTAVR/IOR_ADDRB_2: 41 loads
     Net RTAVR/IOR_ADDRB_3: 36 loads
     Net RTAVR/CMD_ALU_ES1: 34 loads
     Net RTAVR/IOR_ADDRB_4: 33 loads
     Net RTAVR/IOR_ADDRB_5: 33 loads
     Net RTAVR/GPR_POSTINC: 26 loads





   Number of warnings:  18
   Number of errors:    0




Design Errors/Warnings

WARNING: input pad net 'RTS' has no legal load
WARNING: input pad net 'DTR' has no legal load
WARNING: input pad net 'CTS' has no legal load
WARNING: logical net 'ISP/r_pr_665_add_4_1/CI' has no driver
WARNING: logical net 'RTAVR/S1/add_374_1/CI' has no driver
WARNING: logical net 'RTAVR/S1/add_132_1/CI' has no driver
WARNING: logical net 'RTAVR/IOR/i_usart/r_ps_667_add_4_1/CI' has no driver
WARNING: logical net 'RTAVR/IOR/IOR_PS0/i_timer0/r_prescaler_670_add_4_1/CI' has
     no driver
WARNING: logical net 'RTAVR/GPR/add_27_2/CI' has no driver
WARNING: logical net 'RTAVR/GPR/add_616_1/CI' has no driver
WARNING: logical net 'RTAVR/GPR/add_618_2/CI' has no driver
WARNING: logical net 'RTAVR/ALU/add_673_1/CI' has no driver
WARNING: logical net 'RTAVR/ALU/add_10_1/CI' has no driver
WARNING: logical net 'RTAVR/ALU/sub_15_add_2_1/CI' has no driver
WARNING: OSCH 'osc_internal' has mismatching FREQUENCY preference value of 2.08
     MHz and NOM_FREQ value of 24.18 MHz.
WARNING: IO buffer missing for top level port RTS...logic will be discarded.
WARNING: IO buffer missing for top level port DTR...logic will be discarded.
WARNING: IO buffer missing for top level port CTS...logic will be discarded.



IO (PIO) Attributes

+---------------------+-----------+-----------+------------+
| IO Name             | Direction | Levelmode | IO         |
|                     |           |  IO_TYPE  | Register   |
+---------------------+-----------+-----------+------------+
| LED_0               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| LED_1               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| RXD                 | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| LED_2               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| LED_3               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| LED_4               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| EXTOSC              | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| TXD                 | INPUT     | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| TOP_TMS             | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| TOP_TCK             | INPUT     | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+
| TOP_TDI             | INPUT     | LVCMOS25  |            |

+---------------------+-----------+-----------+------------+
| EXTOSC_EN           | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| LED_5               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| LED_6               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| LED_7               | OUTPUT    | LVCMOS33  |            |
+---------------------+-----------+-----------+------------+
| TOP_TDO             | OUTPUT    | LVCMOS25  |            |
+---------------------+-----------+-----------+------------+



Removed logic

Block m0_lut undriven or does not drive anything - clipped.
Block GSR_INST undriven or does not drive anything - clipped.
Signal RTAVR/IOR/i_usart/v_rclk was merged into signal RTAVR/IOR/i_usart/rx_ps_2
Signal RTAVR/IOR/n11793 was merged into signal RTAVR/IOR/DDR_18
Signal RTAVR/IOR/mux_57_1452/Z0 was merged into signal RTAVR/IOR/n2018
Signal ISP/n16 was merged into signal CLK180_OUT
Signal n12274 undriven or does not drive anything - clipped.
Signal GND_net undriven or does not drive anything - clipped.
Signal RTAVR/ALU/sub_15_add_2_1/S0 undriven or does not drive anything -
     clipped.
Signal RTAVR/ALU/sub_15_add_2_1/CI undriven or does not drive anything -
     clipped.
Signal RTAVR/ALU/sub_15_add_2_9/CO undriven or does not drive anything -
     clipped.
Signal RTAVR/ALU/add_10_1/S0 undriven or does not drive anything - clipped.
Signal RTAVR/ALU/add_10_1/CI undriven or does not drive anything - clipped.
Signal RTAVR/ALU/add_10_9/CO undriven or does not drive anything - clipped.
Signal RTAVR/ALU/add_673_1/S0 undriven or does not drive anything - clipped.
Signal RTAVR/ALU/add_673_1/CI undriven or does not drive anything - clipped.
Signal RTAVR/ALU/add_673_9/CO undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_618_16/CO undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_618_2/S0 undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_618_2/CI undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_616_1/S0 undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_616_1/CI undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_27_14/S1 undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_27_14/CO undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_27_2/S0 undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_27_2/CI undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_616_17/S1 undriven or does not drive anything - clipped.
Signal RTAVR/GPR/add_616_17/CO undriven or does not drive anything - clipped.
Signal RTAVR/IOR/IOR_PS0/i_timer0/r_prescaler_670_add_4_7/CO undriven or does
     not drive anything - clipped.
Signal RTAVR/IOR/IOR_PS0/i_timer0/r_prescaler_670_add_4_1/S0 undriven or does
     not drive anything - clipped.
Signal RTAVR/IOR/IOR_PS0/i_timer0/r_prescaler_670_add_4_1/CI undriven or does
     not drive anything - clipped.
Signal RTAVR/IOR/i_usart/r_ps_667_add_4_1/S0 undriven or does not drive anything
     - clipped.
Signal RTAVR/IOR/i_usart/r_ps_667_add_4_1/CI undriven or does not drive anything
     - clipped.

Signal RTAVR/IOR/i_usart/r_ps_667_add_4_13/S1 undriven or does not drive
     anything - clipped.
Signal RTAVR/IOR/i_usart/r_ps_667_add_4_13/CO undriven or does not drive
     anything - clipped.
Signal RTAVR/S1/add_132_1/S0 undriven or does not drive anything - clipped.
Signal RTAVR/S1/add_132_1/CI undriven or does not drive anything - clipped.
Signal RTAVR/S1/add_132_13/S1 undriven or does not drive anything - clipped.
Signal RTAVR/S1/add_132_13/CO undriven or does not drive anything - clipped.
Signal RTAVR/S1/add_374_1/S0 undriven or does not drive anything - clipped.
Signal RTAVR/S1/add_374_1/CI undriven or does not drive anything - clipped.
Signal RTAVR/S1/add_374_11/S1 undriven or does not drive anything - clipped.
Signal RTAVR/S1/add_374_11/CO undriven or does not drive anything - clipped.
Signal ISP/r_pr_665_add_4_1/S0 undriven or does not drive anything - clipped.
Signal ISP/r_pr_665_add_4_1/CI undriven or does not drive anything - clipped.
Signal ISP/r_pr_665_add_4_17/S1 undriven or does not drive anything - clipped.
Signal ISP/r_pr_665_add_4_17/CO undriven or does not drive anything - clipped.
Block RTAVR/IOR/i_usart/i433 was optimized away.
Block RTAVR/IOR/mux_51_i3_4_lut_else_4_lut was optimized away.
Block RTAVR/IOR/mux_57_1452/LUT0 was optimized away.
Block ISP/i16 was optimized away.
Block i1 was optimized away.



Memory Usage

/RTAVR/GPR:
    EBRs: 1
    RAM SLICEs: 4
    Logic SLICEs: 40
    PFU Registers: 51
    -Contains EBR gpr_lo_d10:  TYPE= DP8KC,  Width_B= 8,  Depth_A= 8,  Depth_B=
         8,  REGMODE_A= NOREG,  REGMODE_B= NOREG,  RESETMODE= SYNC,
         ASYNC_RESET_RELEASE= SYNC,  WRITEMODE_A= WRITETHROUGH,  WRITEMODE_B=
         WRITETHROUGH,  GSR= DISABLED
/RTAVR/GPR/gpr_hi0:
    EBRs: 0
    RAM SLICEs: 3
    Logic SLICEs: 0
    PFU Registers: 0
/RTAVR/GPR/gpr_hi1:
    EBRs: 0
    RAM SLICEs: 3
    Logic SLICEs: 0
    PFU Registers: 0
/RTAVR/GPR/gpr_hi2:
    EBRs: 0
    RAM SLICEs: 3
    Logic SLICEs: 0
    PFU Registers: 0
/RTAVR/GPR/gpr_hi3:
    EBRs: 0
    RAM SLICEs: 3
    Logic SLICEs: 0
    PFU Registers: 0
/RTAVR/GPR/gpr_hi_d20:
    EBRs: 0

    RAM SLICEs: 1
    Logic SLICEs: 0
    PFU Registers: 0
/RTAVR/GPR/gpr_hi_d21:
    EBRs: 0
    RAM SLICEs: 1
    Logic SLICEs: 0
    PFU Registers: 0
/RTAVR/GPR/gpr_lo0:
    EBRs: 0
    RAM SLICEs: 3
    Logic SLICEs: 0
    PFU Registers: 0
/RTAVR/GPR/gpr_lo1:
    EBRs: 0
    RAM SLICEs: 3
    Logic SLICEs: 0
    PFU Registers: 0
/RTAVR/GPR/gpr_lo_d00:
    EBRs: 0
    RAM SLICEs: 3
    Logic SLICEs: 0
    PFU Registers: 0
/RTAVR/GPR/gpr_lo_d01:
    EBRs: 0
    RAM SLICEs: 3
    Logic SLICEs: 0
    PFU Registers: 0
/RTAVR/RAM:
    EBRs: 2
    RAM SLICEs: 0
    Logic SLICEs: 0
    PFU Registers: 0
    -Contains EBR mem1:  TYPE= SP8KC,  Width= 4,  Depth= 2048,  REGMODE= NOREG,
         RESETMODE= SYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE= WRITETHROUGH,
         GSR= DISABLED
    -Contains EBR mem0:  TYPE= SP8KC,  Width= 4,  Depth= 2048,  REGMODE= NOREG,
         RESETMODE= SYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE= WRITETHROUGH,
         GSR= DISABLED
/RTAVR/ROM:
    EBRs: 4
    RAM SLICEs: 0
    Logic SLICEs: 0
    PFU Registers: 0
    -Contains EBR rom0:  TYPE= SP8KC,  Width= 4,  Depth= 2048,  REGMODE= NOREG,
         RESETMODE= SYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE= WRITETHROUGH,
         GSR= DISABLED
    -Contains EBR rom3:  TYPE= SP8KC,  Width= 4,  Depth= 2048,  REGMODE= NOREG,
         RESETMODE= SYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE= WRITETHROUGH,
         GSR= DISABLED
    -Contains EBR rom2:  TYPE= SP8KC,  Width= 4,  Depth= 2048,  REGMODE= NOREG,
         RESETMODE= SYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE= WRITETHROUGH,
         GSR= DISABLED
    -Contains EBR rom1:  TYPE= SP8KC,  Width= 4,  Depth= 2048,  REGMODE= NOREG,
         RESETMODE= SYNC,  ASYNC_RESET_RELEASE= SYNC,  WRITEMODE= WRITETHROUGH,
         GSR= DISABLED




PLL/DLL Summary
---------------

PLL 1:                                     Pin/Node Value
  PLL Instance Name:                                pll
  PLL Type:                                         EHXPLLJ
  Input Clock:                             NODE     CLK_IN0
  Output Clock(P):                         NODE     CLK0_OUT
  Output Clock(S):                         NODE     CLK90_OUT
  Output Clock(S2):                        NODE     CLK180_OUT
  Output Clock(S3):                        NODE     CLK270_OUT
  Feedback Signal:                         NODE     CLK0_OUT
  Reset Signal:                                     NONE
  M Divider Reset Signal:                           NONE
  C Divider Reset Signal:                           NONE
  D Divider Reset Signal:                           NONE
  Standby Signal:                                   NONE
  PLL LOCK signal:                                  NONE
  PLL Data bus CLK Signal:                          NONE
  PLL Data bus Strobe Signal:                       NONE
  PLL Data bus Reset Signal:                        NONE
  PLL Data bus Write Enable Signal:                 NONE
  PLL Data bus Address0:                            NONE
  PLL Data bus Address1:                            NONE
  PLL Data bus Address2:                            NONE
  PLL Data bus Address3:                            NONE
  PLL Data bus Address4:                            NONE
  PLL Data In bus Data0:                            NONE
  PLL Data In bus Data1:                            NONE
  PLL Data In bus Data2:                            NONE
  PLL Data In bus Data3:                            NONE
  PLL Data In bus Data4:                            NONE
  PLL Data In bus Data5:                            NONE
  PLL Data In bus Data6:                            NONE
  PLL Data In bus Data7:                            NONE
  PLL Data bus Acknowledge:                         NONE
  PLL Data Out bus Data0:                           NONE
  PLL Data Out bus Data1:                           NONE
  PLL Data Out bus Data2:                           NONE
  PLL Data Out bus Data3:                           NONE
  PLL Data Out bus Data4:                           NONE
  PLL Data Out bus Data5:                           NONE
  PLL Data Out bus Data6:                           NONE
  PLL Data Out bus Data7:                           NONE
  Input Clock Frequency (MHz):                      12.0000
  Output Clock(P) Frequency (MHz):                  NA
  Output Clock(S) Frequency (MHz):                  NA
  Output Clock(S2) Frequency (MHz):                 NA
  Output Clock(S3) Frequency (MHz):                 NA
  CLKOP Post Divider A Input:                       DIVA
  CLKOS Post Divider B Input:                       DIVB
  CLKOS2 Post Divider C Input:                      DIVC
  CLKOS3 Post Divider D Input:                      DIVD
  Pre Divider A Input:                              VCO_PHASE

  Pre Divider B Input:                              VCO_PHASE
  Pre Divider C Input:                              VCO_PHASE
  Pre Divider D Input:                              VCO_PHASE
  VCO Bypass A Input:                               VCO_PHASE
  VCO Bypass B Input:                               VCO_PHASE
  VCO Bypass C Input:                               VCO_PHASE
  VCO Bypass D Input:                               VCO_PHASE
  FB_MODE:                                          CLKOP
  CLKI Divider:                                     24
  CLKFB Divider:                                    33
  CLKOP Divider:                                    16
  CLKOS Divider:                                    16
  CLKOS2 Divider:                                   16
  CLKOS3 Divider:                                   16
  Fractional N Divider:                             0
  CLKOP Desired Phase Shift(degree):                -337
  CLKOP Trim Option Rising/Falling:                 RISING
  CLKOP Trim Option Delay:                          0
  CLKOS Desired Phase Shift(degree):                -331
  CLKOS Trim Option Rising/Falling:                 RISING
  CLKOS Trim Option Delay:                          0
  CLKOS2 Desired Phase Shift(degree):               -326
  CLKOS3 Desired Phase Shift(degree):               -320

OSC Summary
-----------

OSC 1:                                     Pin/Node Value
  OSC Instance Name:                                osc_internal
  OSC Type:                                         OSCH
  STDBY Input:                                      NONE
  OSC Output:                              NODE     CLK_INT
  OSC Nominal Frequency (MHz):                      24.18

DCMA Summary
------------

DCMA 1:                                     Pin/Node Value
  DCMA Instance Name:                                clk_selector
  DCMA Type:                                         DCMA
  CLK0 Input:                              NODE     CLK_INT
  CLK1 Input:                              PIN      EXTOSC_c
  SEL Input:                                        NONE
  DCMOUT Output:                           NODE     CLK_IN0



ASIC Components
---------------

Instance Name: clk_selector
         Type: DCMA
Instance Name: osc_internal
         Type: OSCH
Instance Name: pll
         Type: EHXPLLJ
Instance Name: RTAVR/ROM/rom0
         Type: SP8KC

Instance Name: RTAVR/ROM/rom3
         Type: SP8KC
Instance Name: RTAVR/ROM/rom2
         Type: SP8KC
Instance Name: RTAVR/ROM/rom1
         Type: SP8KC
Instance Name: RTAVR/RAM/mem1
         Type: SP8KC
Instance Name: RTAVR/RAM/mem0
         Type: SP8KC
Instance Name: RTAVR/IOR/i_port_c/bscan
         Type: JTAGF
Instance Name: RTAVR/GPR/gpr_lo_d10
         Type: DP8KC



Run Time and Memory Usage
-------------------------

   Total CPU Time: 5 secs
   Total REAL Time: 6 secs
   Peak Memory Usage: 37 MB






































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